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IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 45, NO. 6, JUNE 2010 1111 A 10-bit 100-MS/s Reference-Fre

1116 IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 45, NO. 6, JUNE 2010 Fig. 6. Circuit schematic of the dynamic comparator. Fig. 7. (a) Timing diagram of bit-cycling. (b) Self-timed loop diagram and circuit schematic of VDC used to generate the ......

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