ARM Cortex-M - Wikipedia, the free encyclopedia
The Cortex-M0 core is optimized for small silicon die size and use in the lowest price chips. Key features of the Cortex-M0 core are:[1] ARMv6-M architecture[6] 3-stage pipeline. Instruction sets: Thumb (most), missing CBZ, CBNZ, IT. Thumb-2 (some), only ...